The Fourth CSAIL Computer Architecture Workshop

Friday, September 24th, 2004
The Warren Conference Center & Inn, Ashland, Massachusetts
Past Workshops

Friday, September 24th, 2004

9:00 AM - 10:00 AM

Bus departs from Stata Center for Warren Center in Ashland
10:00 AM - 10:30 AM Breakfast

10:30 AM - 12:00 PM

Keynote Speaker: Professor Rahul Sarpeshkar (more below)

Title: Hybrid Analog-Digital Architectures

12:00 PM - 1:30 PM Lunch
1:30PM - 2:30PM

Arvind - Defining store atomicity or memory operations with memory

Rodric Rabbah - Cooperative Execution

Charles W. O'Donnell - Program Partitioning for Secure Execution

2:30 PM - 2:40 PM


2:40 PM - 3:40 PM

Dave Wentzlaff - Introspective Morphable Microarchitectures

Ken Barr - Accelerating Multiprocessor Simulation with a Memory Timestamp Record

Umar Saif - Hip Routing, RAW Hardware

3:40 PM - 3:50 PM Break
3:50 PM - 4:50 PM

Chris Batten - Cache Refill/Access Decoupling for Vector Machines

Jason Miller - Software-based Instruction Caching System for RAW

Bradley Kuszmaul - Practical Cache-Oblivious B-Trees

4:50 PM - 5:00 PM Break
5:00 PM - 6:00 PM Discussion led by Professor Arvind and Professor Asanovic on
Rethinking Computer Architecture Research

6:00 PM - 7:30 PM Dinner
7:30 PM - 8:30 PM Bus returns to Stata Center


KEYNOTE SPEAKER: Professor Rahul Sarpeshkar

Title: Hybrid Analog-Digital Architectures

Abstract: I will describe why the optimal strategy for efficient computation is likely to be a hybrid mixture of analog and digital computation. I will demonstrate a soon-to-go-commercial bionic ear processor with such low power consumption that a conventional A-D-then-DSP technique will not be able to be at it two decades in the future. I will outline research on building energy-efficient architectures that are inspired by pulsatile analog-digital representations in the brain's neurons and show examples of very energy efficient architectures that can built with such techniques. I conclude by summarizing the promise of biologically inspired hybrid architectures for sensory data processing.

Biography: Rahul Sarpeshkar obtained Bachelor's degrees in Electrical Engineering and Physics at MIT. After completing his PhD at Caltech, he joined Bell Labs as a member of the technical staff. Since 1999, he has been on the faculty of MIT's Electrical Engineering and Computer Science Department where he heads a research group on Analog VLSI and Biological Systems, and is currently the Robert J. Shillman Associate Professor. He has received several awards including the Packard Fellow award given to outstanding young faculty, the ONR Young Investigator Award, and the NSF Career Award. He was recently awarded the Junior Bose Award for Excellence in Teaching at MIT. He holds over fifteen patents and has authored several publications including one that was featured on the cover of NATURE. His research interests include analog and mixed-signal VLSI, ultra low power circuits and systems, biologically inspired circuits and systems, and control theory.